Open source projects in Verilog

  • wyager/HaSKI

    Cλash/Haskell FPGA-based SKI calculus evaluator

    ☕Verilog   ★20 stars   ⚠0 open issues   ⚭1 contributors   ☯about 3 years old  
  • parallella/oh

    Silicon proven Verilog library for IC and FPGA designers

    ☕Verilog   ★320 stars   ⚠27 open issues   ⚭6 contributors   ☯over 3 years old  
  • wtiandong/Hardware_circular_buffer_controller

    This is a circular buffer controller used in FPGA.

    ☕Verilog   ★2 stars   ⚠0 open issues   ⚭1 contributors   ☯almost 3 years old  
  • analogdevicesinc/hdl

    HDL libraries and projects

    ☕Verilog   ★202 stars   ⚠7 open issues   ⚭8 contributors   ☯almost 5 years old  
  • Arlet/verilog-6502

    A Verilog HDL model of the MOS 6502 CPU

    ☕Verilog   ★93 stars   ⚠1 open issues   ⚭1 contributors   ☯over 7 years old  
  • ngzhang/Icarus

    DUAL Spartan6 Development Platform

    ☕Verilog   ★67 stars   ⚠3 open issues   ⚭2 contributors   ☯about 7 years old  
  • NetFPGA/netfpga

    NetFPGA 1G infrastructure and gateware

    ☕Verilog   ★155 stars   ⚠10 open issues   ⚭9 contributors   ☯over 6 years old  
  • openrisc/mor1kx

    mor1kx - an OpenRISC 1000 processor IP core

    ☕Verilog   ★178 stars   ⚠8 open issues   ⚭11 contributors   ☯over 6 years old  
  • m-labs/milkymist

    SoC design for Milkymist One - LM32, DDR SDRAM, 2D TMU, PFPU

    ☕Verilog   ★103 stars   ⚠0 open issues   ⚭10 contributors   ☯over 9 years old  
  • marmolejo/zet

    Open source implementation of a x86 processor

    ☕Verilog   ★146 stars   ⚠3 open issues   ⚭4 contributors   ☯over 8 years old  
  • kramble/FPGA-Litecoin-Miner

    A litecoin scrypt miner implemented with FPGA on-chip memory.

    ☕Verilog   ★190 stars   ⚠6 open issues   ⚭2 contributors   ☯over 5 years old  
  • VerticalResearchGroup/miaow

    An open source GPU based off of the AMD Southern Islands ISA.

    ☕Verilog   ★415 stars   ⚠10 open issues   ⚭2 contributors   ☯over 4 years old  
  • jerry-D/SYMPL-GP-GPU-Compute-Engines

    Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in open-source Verilog RTL for IEEE754-2008 compliant, 32-bit single-precision floating-point accelerated applications.

    ☕Verilog   ★14 stars   ⚠0 open issues   ⚭1 contributors   ☯over 3 years old  
  • jmahler/mips-cpu

    MIPS CPU implemented in Verilog

    ☕Verilog   ★181 stars   ⚠2 open issues   ⚭1 contributors   ☯over 5 years old  
  • seldridge/verilog

    Repository for basic (and not so basic) Verilog blocks with high re-use potential.

    ☕Verilog   ★100 stars   ⚠0 open issues   ⚭1 contributors   ☯over 6 years old  
  • Obijuan/open-fpga-verilog-tutorial

    Aprender a diseñar sistemas digitales sintetizables en FPGAs usando SOLO herramientas libres #verilog #icestorm #lattice #Linux

    ☕Verilog   ★145 stars   ⚠2 open issues   ⚭4 contributors   ☯over 3 years old  
  • teknohog/Xilinx-Serial-Miner

    Bitcoin miner for Xilinx FPGAs

    ☕Verilog   ★62 stars   ⚠2 open issues   ⚭1 contributors   ☯over 7 years old  
  • alfikpl/ao68000

    The OpenCores ao68000 IP Core is a Motorola MC68000 binary compatible processor.

    ☕Verilog   ★37 stars   ⚠3 open issues   ⚭1 contributors   ☯over 7 years old  
  • maidenone/ORGFXSoC

    An Example implementation of Open Source Graphics Accelerator, (A fixed point, fixed function pipeline GPU)

    ☕Verilog   ★40 stars   ⚠2 open issues   ⚭1 contributors   ☯over 6 years old  
  • MorrisMA/MAM65C02-Processor-Core

    Microprogrammed 65C02-compatible Processor Core for FPGAs (Verilog-2001)

    ☕Verilog   ★26 stars   ⚠0 open issues   ⚭1 contributors   ☯over 6 years old  
  • casper-astro/mlib_devel

    ☕Verilog   ★27 stars   ⚠8 open issues   ⚭23 contributors   ☯about 7 years old  
  • strigeus/fpganes

    NES in Verilog

    ☕Verilog   ★69 stars   ⚠3 open issues   ⚭1 contributors   ☯almost 5 years old  
  • brianbennett/fpga_nes

    FPGA-based Nintendo Entertainment System Emulator

    ☕Verilog   ★101 stars   ⚠22 open issues   ⚭1 contributors   ☯over 6 years old  
  • jamieiles/oldland-cpu

    Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools

    ☕Verilog   ★76 stars   ⚠1 open issues   ⚭1 contributors   ☯over 5 years old  
  • openrisc/orpsoc-cores

    Core description files for FuseSoC

    ☕Verilog   ★84 stars   ⚠15 open issues   ⚭15 contributors   ☯over 5 years old  
  • dtysky/FPGA-Imaging-Library

    An open source library for image processing on FPGA.

    ☕Verilog   ★117 stars   ⚠0 open issues   ⚭1 contributors   ☯almost 4 years old  
  • m-labs/lm32

    LatticeMico32 soft processor

    ☕Verilog   ★57 stars   ⚠0 open issues   ⚭5 contributors   ☯almost 6 years old  
  • ridecore/ridecore

    RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

    ☕Verilog   ★96 stars   ⚠1 open issues   ⚭2 contributors   ☯over 2 years old  
  • jbush001/RotorCPU

    Parallel Array of Simple Cores. Multicore processor.

    ☕Verilog   ★44 stars   ⚠0 open issues   ⚭1 contributors   ☯over 5 years old  
  • ucb-bar/fpga-zynq

    Support for Rocket Chip on Zynq FPGAs

    ☕Verilog   ★125 stars   ⚠5 open issues   ⚭9 contributors   ☯over 4 years old